iQ-F / iQ-R / Battery and Latch

[Neverov]

Good day.

I can't understand how the memory (Latch) is arranged and what the battery affects. The manuals are very uninformative.

1) iQ-F and iQ-R store the program in EEPROM. Without a battery, the program is not destroyed (as in previous series). Do I understand correctly?

2) In the memory settings, there is a Latch area. Registers retain their value when the power is turned off (I checked in practice), without a battery. How long will they be saved without power?

3) What changes in the operation of the Latch area if we install a battery?

4) Is the operation of the Latch area the same in iQ-F and iQ-R?

5) Thinking out loud. All registers by default work in RAM memory and when turned off, the Latch area is saved in EEPROM. Then when turned on, it restores the values ???

[Crossbow]

Program is stored to permanent memory.  Latch area is backed up by battery.  There may be a capacitor backup that holds for a short period of time, but the latched data is dependent on the battery.

[Crossbow]

Program is stored to permanent memory.  Latch area is backed up by battery.  There may be a capacitor backup that holds for a short period of time, but the latched data is dependent on the battery.

[SergeyBorchshev]

Hello,

 iQ-F and iQ-R are very different platforms. Even in one family PLC handles the memory very differently. In both families there are CPUs that retain latched device state in CPU memory and do not need a battery for that (there are limitation on memory size allocated for that). But optional battery gives you an option to expand backed p latching range. Some CPUs have an option installing a cassette to battery-less data retaining.

If you give your PLC model, I can send you more info...